This invention relates generally to reactor processes for forming layers of material on substrates such as semiconductor wafer substrates, using gas chemistry and heating techniques such as radiant heating and induction heating.
In particular, the present invention relates to the chemical epitaxial deposition of a layer on a semiconductor substrate wafer and to a process for forming epitaxial layers which are substantially free of particles and particle-related defects.
As measured by minimum feature size and device density, the scale of integration of semiconductor devices in integrated circuit chips (IC) has been improved greatly since the middle and late 1970's. In fact, over the past five years, the silicon IC technology has grown from large scale integration (LSI) to very large scale integration (VLSI), and is projected to soon grow to ultralarge scale integrating (ULSI). This continuing improvement in silicon integrated circuit integration has been made possible by advances in integrated circuit manufacturing equipment, as well as in the materials and methods utilized in processing semiconductor wafers into chips. Some of the most dramatic advances in manufacturing equipment have involved improved apparatus for lithography and etching. Generally, the density of integrated circuits and their speed of operation are dependent upon the accuracy and resolution of the lithography and etching apparatus used to form patterns of circuit elements in masking layers on the semiconductor wafer. An equally important aspect of semiconductor IC manufacture is the ability to consistently achieve a high yield of good working IC devices on the semiconductor substrate wafer.
The implementation of epitaxial layers, both homoepitaxial and heteroepitaxial, on an underlying substrate layer has a great impact on the yields of the associated IC wafers. A primary example is the growth of epitaxial silicon on a semiconductor wafer substrate. Growth of an epitaxial silicon layer is typically performed in a chemical vapor deposition process in which the wafers are heated while a gaseous silicon compound is passed over the wafer to effect pyrolysis or decomposition. Epitaxial deposition in general and silicon epitaxial deposition in particular are integral parts of VLSI processing, especially for the advanced bipolar, NMOS and CMOS technologies, and for future advanced technologies such as ULSI, since many of the components of the individual transistors and devices are formed in an epitaxial layer.
The ability to process good quality advanced NMOS, CMOS and bipolar IC chips using epitaxy is strongly dependent on maintaining a substantially defect-free state (1) for the bulk semiconductor wafer and for the surface of the bulk wafer, and (2) during the step of depositing the epitaxial silicon layer. Simply put, and as discussed below, elimination of both sub-surface and surface defects is crucial to obtaining good yields in current and future technologies, particularly as those technologies progress toward a minimum device feature size of one micron and smaller.
Surface defects are usually related to particles and induce lithographic patterning defects. This is extremely critical for minimum device feature sizes of one micron and below and for large chip areas, since a single lithographic defect in such devices can cause non-functionality of the device and as few as one defect per square centimeter (about 80 defects per four inch wafer) can have catastrophic effects on wafer processing yields. It is a characteristic of epitaxial processing that the crystallographic nature and defect level of the deposited epitaxial layer or epi layer reflects the parent or bulk substrate wafer. Thus, for example, stacking faults on the substrate can give rise to epitaxial stacking faults, and dislocations in the substrate can be transmitted through the epi layer. In addition, epitaxial defects such as pits, hillocks and micro-contamination result from the bulk substrate wafer surface particles. As a consequence, even where the parent substrate is substantially defect-free (the introduction of substantially defect-free silicon wafer starting material in the mid 1970's offered this possibility), the growth of defect-free epitaxial layers requires the elimination of particles on the surface of the parent substrate wafer. Unfortunately, using present day epitaxial processing technology, the elimination or substantial decrease in particulates and the associated achievement of very low particle-related defect densities are accomplished at the expense of extensive run and wafer inspection and very low wafer yields, rather than resulting from the growth consistently high quality epitaxial films.
In most reactors used for the growth of epitaxial silicon, the wafers are heated in one of two ways: indirect heating from an inductively heated susceptor, or direct heating in a radiant heating mode by infrared and visible radiation from a bank of tungsten-halogen lamps. FIGS. 1 and 2 show typical prior art induction heated horizontal and pancake reactors. FIG. 3 shows a radiantly-heated reactor that has become the commercial system of choice for high temperature CVD processing; in part because the more uniform heating of the wafers produces more slip-free wafers at the end of the epitaxial growth process.
The induction-heated horizontal reactor system 10 depicted in FIG. 1 utilizes a quartz tube 11, which has a load door 12 at one end with a gas inlet 13 therethrough and an exhaust port 14 at the other end. Silicon wafers 15 are supported on a susceptor 16 which is held at an angle by a quartz susceptor holder 17. Induction heating coil 18 causes heating of the susceptor wafer carrier 16, which in turn heats the silicon wafers 15 by a combination of conduction and radiation.
The same type of induction heating is used in the vertical (pancake) reactor system 20 shown in FIG. 2. In this system, a quartz bell jar 21 houses a susceptor 22 on which the silicon wafers 23 are mounted. The susceptor 22 is heated by an induction coil(s) 24 which, in turn, heats the silicon wafers 23. Gaseous products used to form the epitaxial silicon layer and to dope the layer are introduced through gas inlet 25. The reaction products are exhausted from the interior of bell jar 21 through exhaust ports 26 and 27.
FIG. 3 illustrates .schematically a radiantly-heated reactor system 30 which is commercially available from Applied Materials, Inc. of Santa Clara, Calif. In this system 30, an inverted quartz bell jar 31 houses a generally cylindrical susceptor 32 on which silicon wafers 33 are mounted. Modular banks 34 of tungsten-halogen cycle lamps surround the exterior of the quartz bell jar 31 and are powered by lamp power supply 38 for radiantly heating both the susceptor 32 and the wafers 33 mounted thereon. Gases for forming and doping the epitaxial silicon layers are provided to the interior of the bell jar 31 through gas inlet, as indicated schematically at 39. A susceptor lift-rotation assembly 35 rotates the susceptor 32 within the bell jar 31 for uniform deposition of the epitaxial layer. The assembly 35 also elevates the susceptor 32 for loading and unloading the wafers 33. Reaction products are exhausted through a port 36 at the bottom of the bell jar. A cooling supply 37 is provided both for the lamp modules 34 (to increase the lifetime of the lamps) and also for the exterior walls of the quartz bell jar 31. Cooling of the quartz bell jar 31 is preferable to minimize the formation of silicon deposits on the interior walls thereof. Such deposits can later cause a particulate contamination problem, if portions flake off and become incorporated into the epitaxial layer being formed on the individual wafers.
The radiant heated reactor system 30 shown schematically in FIG. 3 has been a workhorse in the semiconductor industry for many years. In this system, the simultaneous radiant heating of both the susceptor and the wafer produces uniform heating of the wafer and slip-free silicon epitaxy. In addition, the vertical orientation of the susceptor and wafers greatly reduces particulate deposition on the wafers by gravity. This is in contrast to the horizontally oriented susceptors of the RF systems 10, FIG. 1, and 20, FIG. 2, for which gravity is a primary particle deposition mechanism.
Despite the uniform heating, low particulate contamination, slip-free performance of the radiantly heated reactor system 30, which has greatly contributed to its acceptance in the semiconductor industry, and as is always the case, the system does have room for improvement. The desired improvement is in the area of particulate-generated defects when the system is used for advanced, very small minimum feature-size IC processes. The basic problem is simply that it is virtually impossible to eliminate all sources of contaminants, such as wall deposits, in reactor systems. Thus, while the cool-wall nature of the radiantly heated reactor system 30, supplemented by air cooling of the chamber walls, substantially lowers the rate of deposition of contaminants on the interior walls of the chamber and lengthens the cleaning intervals for the chamber, it is a fact that some deposits are formed on the chamber walls and other internal chamber components during the epitxial process. Unfortunately, as mentioned previously, the advanced, very small minimum feature size IC chips are extremely sensitive to even very low levels of particulate contamination of the wafers, and, thus, even the radiantly heated, vertically oriented, low contamination system 30 may have difficulty in consistently meeting the very high quality, very low defect density specifications of such chips at high yield levels.